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eASIC and Northwest Logic Add DDR2-533 MHz Memory Support to Custom LSIs

An important design feature by eASIC and Northwest Logic is faster performance than traditional mid-density FPGA solutions. The gain, according to the developers, reaches 60%. This made it possible to support the transmission rate of 533 Mbit / s (in the case of FPGA, this value is limited to 333 Mbit / s).

The product will be available in the eASIC Nextreme series. It is based on a high-performance DDR2 SDRAM controller core from Northwest Logic and a physical layer interface (DDR PHY) optimized for eASIC products. In addition to built-in I / O channels, the solution also includes other peripheral blocks, such as AHB / AXI interface and error correction circuits (ECC), which simplifies interfacing with other subsystems as part of an ordered highly integrated integrated circuit.

Recall that the other day the company presented another development in the field of ASIC. It enabled Nexus Chips to dramatically improve the performance and power consumption of its 3D accelerator for mobile devices.

Source: eASIC

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