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EASIC has dramatically improved mobile 3D accelerator

Another success was boasted by eASIC, which recently implemented a Gaisler Research LEON3 SPARC processor in FPGA.

This time, the development of eASIC has enabled Nexus Chips, a Korean graphics accelerator solution provider, to significantly improve the performance of the 3D accelerator chip. By switching from a previously used FPGA to a custom Nextreme LSI from eASIC, Nexus Chips has been able to double the performance of the accelerator while reducing power consumption by 80%.

Reducing power consumption is especially important in this case, as the development of the Nexus Chips is focused on applications in mobile devices such as cell phones and measuring instruments. The gain in performance is due to the high speed of logic elements and the architectural features of Nextreme, in particular, the presence of on-board memory.

Source: eASIC

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