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Toshiba has increased the density of 45nm chips by another 30%
According to the Toshiba company, made at the VLSI symposium in Honolulu, its specialists managed to develop a technology for increasing the density of the photomask elements, due to which, with the same crystal area, the number of integrated circuit elements can be increased by 30%.
For comparison, the transition from 65 nm norms to 45 nm norms provides a doubling of density. The use of new technology increases this indicator up to 2.6 times.
The design is based on taking into account one of the effects arising from the reduction of circuit components. It is known as “topological dependence” and consists in changing the parameters of transistors under the influence of adjacent structures. The value of the effect increases as you move to finer norms, as the distance between elements decreases.
By changing the gate parameters of the transistors in the model used in the design of the circuit topology, Toshiba engineers were able to ensure a tighter placement of transistors without losing their performance.
At the moment, researchers have managed to achieve a density of 2.1 million. gates per sq. mm 45nm chip. For a regular 45nm chip, this figure is 1.6, and for a 65nm chip, it is 0.8.